- Dual Channel DDR4 Memory Technology
- 4 x DDR4 DIMM Slots
- AMD Ryzen series CPUs (Vermeer) support DDR4 4533+(OC) / 4466(OC) / 4400(OC) / 4333(OC) / 4266(OC) / 4200(OC) / 4133(OC) / 4000(OC) / 3866(OC) / 3800(OC) / 3733(OC) / 3600(OC) / 3466(OC) / 3200 / 2933 / 2667 / 2400 / 2133 ECC & non-ECC, un-buffered memory
*- AMD Ryzen series CPUs (Matisse) support DDR4 4533+(OC) / 4466(OC) / 4400(OC) / 4333(OC) / 4266(OC) / 4200(OC) / 4133(OC) / 4000(OC) / 3866(OC) / 3800(OC) / 3733(OC) / 3600(OC) / 3466(OC) / 3200 / 2933 / 2667 / 2400 / 2133 ECC & non-ECC, un-buffered memory
*- AMD Ryzen series APUs (Cezanne) support DDR4 4733+(OC) / 4666(OC) / 4600(OC) / 4533(OC) / 4466(OC) / 4400(OC) / 4333(OC) / 4266(OC) / 4200(OC) / 4133(OC) / 4000(OC) / 3866(OC) / 3800(OC) / 3733(OC) / 3600(OC) / 3466(OC) / 3200 / 2933 / 2667 / 2400 / 2133 ECC & non-ECC, un-buffered memory
*- AMD Ryzen series APUs (Renoir) support DDR4 4733+(OC) / 4666(OC) / 4600(OC) / 4533(OC) / 4466(OC) / 4400(OC) / 4333(OC) / 4266(OC) / 4200(OC) / 4133(OC) / 4000(OC) / 3866(OC) / 3800(OC) / 3733(OC) / 3600(OC) / 3466(OC) / 3200 / 2933 / 2667 / 2400 / 2133 ECC & non-ECC, un-buffered memory
*- AMD Ryzen series APUs (Picasso) support DDR4 3333+(OC) / 3200(OC) / 2933 / 2667 / 2400 / 2133 non-ECC, un-buffered memory
*- Max. capacity of system memory: 128GB
**- Supports Extreme Speicherprofile (XMP) memory modules
- 15μ Gold Contact in DIMM Slots
**For Ryzen Series APUs (Picasso, Cezanne and Renoir), ECC is only supported with PRO CPUs.
Please refer to below table for AMD non-XMP memory frequency support. For more details.
Ryzen Series CPUs (Vermeer):
Ryzen Series CPUs (Matisse):
Ryzen Series APUs (Cezanne):
Ryzen Series APUs:
Ryzen Series CPUs (Picasso):
SR: Single rank DIMM, 1Rx4 or 1Rx8 on DIMM module label x=1 or 2
DR: Dual rank DIMM, 2Rx4 or 2Rx8 on DIMM module label
**Aufgrund von Limitierungen im Betriebssystem ist es möglich, dass Windows
® 32-bit OS weniger als 4 GB RAM für das System reservieren kann. For Windows
® 64-bit OS with 64-bit CPU, there is no such limitation.